1. Field of the Invention
The present invention relates to the management of system stacks in microcontrollers and has been developed with particular attention paid to its possible application to the management of a system stack in a microcontroller, for example of the register-file-based type. Reference to the above possible application must not, however, be understood as in any way limiting the sphere of protection of the invention, which is of an altogether general nature.
2. Description of the Related Art
A typical operation that is very frequently carried out in a microcontroller is the storage/restoring of the state of the system in particular locations of the volatile memory (generally RAM). The above operation derives directly from the need to perform jumps to special routines at arbitrary instants in time, within the program flow, following upon occurrence of external or internal interrupts.
The state of the system consists of a certain number of registers, which is different for each microcontroller. Typically, the state can be reconstructed using the registers Program Counter (PC) and Condition Code Register (CCR), in addition to a variable number of other registers.
The operation of storage/restoring of the state may thus occupy the microcontroller for a time interval dedicated to the context-switching function. The said interval is usually quite long, owing to the sequentiality with which writing/restoring of the state in the system stack takes place. This determines a degradation in the overall performance, also in control applications that are not real-time ones.
Furthermore, very frequently the registers do not have dimensions equal to multiples of the length of the word of the volatile memory in which they are to be stored. A typical example of such a situation is the storage of the CCR, which normally consists of just a few bits.
The situation in a RAM following upon one or more executions of different interrupts may therefore be the one represented—purely by way of example—in FIG. 1 of the annexed drawings, where the reference U designates unused memory locations.
The situation described above amounts to a waste of memory due to the small dimension of the CCR, or of any other state register that has a size that is small as compared to the length of the RAM word.
If a traditional solution is resorted to, such as the one illustrated by way of example in FIG. 2, management of the system stack within the RAM, designated by ST, takes place in a sequential way, without optimization of the area used by the system stack in the memory.
The traditional architecture represented in FIG. 2 envisages that a control unit UC will generate two signals use_ss and up_down addressed to the unit SM functioning as stack manager. The unit SM generates the pointer indicating the system stack, which is commonly referred to as System Stack Pointer or ssp, which is to be forwarded to a first module 10.
The module 10 functions as a multiplexer for selecting between the signal ssp—during context switching—and the signal ram_pointer, indicating the RAM address—during normal operation—, so as to generate a signal address_ram used for managing the portion of RAM dedicated to the addresses.
Another module 12, having the function of a multiplexer, receives at input, in addition to the signal data_bus coming from the data bus of the microcontroller, also two signals PC and CCR indicating the Program Counter and the Condition Code Register, respectively, the purpose being to generate at output the signal data_ram used for managing the portion of RAM dedicated to the data.
The references 10a and 12a designate the lines on which the signals for selecting the multiplexers regulating operation of the modules 10 and 12 are present, whilst the lines designated by wen and csn correspond to the lines on which the corresponding signals indicating, respectively, write enable and read enable of the RAM where the system stack resides are forwarded to the stack ST.
Present on the output line of the stack, designated by 14, is the corresponding output signal, out_stack.
The architecture represented in FIG. 2 corresponds to solutions of a known type, this fact rendering any further detailed description thereof superfluous.
The above solution is used, for example, in the microcontroller sold under the trade name ST 5 by STMicroelectronics, the assignee of the present application. This is a microcontroller of the type referred to as register-file-based.
Execution of the context-switching operation mentioned previously typically requires a time interval of approximately two clock cycles for a microcontroller of the ST 5 type and approximately ten clock cycles for a microcontroller of the accumulator-based type.